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Moore’s law, which predicts that the density of ICs doubles every 1.5 years, is approaching the fundamental physical limits. Furthermore, in advanced IC designs, the delay time is no longer limited by the transistors themselves, but rather by the RC delay between the transistors: the interconnects.

3-D integrated circuits (3D-ICs), in which active devices are vertically stacked upon each other separated by insulating layers, will break-through the problems of conventional 2D ICs. The short and dense interconnects will provide a short delay time and massive parallel processing capability, hence leads to a faster and/or low power operation with a small overall system size. Also the 3D-ICs can integrate more components with different functions in a chip, e.g, sensors, which increases the functionality.

In this research we propose 3D monolithic integrated circuits with single grain Si TFTs which can stack the transistors on top of each other with a low-temperature process.

Team: S. Vollebregt, A. Arslan, R. Ishihara

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